WISC-SP22-5-Stage-Pipelined-Processor
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verilog
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archsim.trace
archsim.trace
Raw
INUM: 0 PC: 0x0000 REG: 1 VALUE: 0x0018 INUM: 1 PC: 0x0002 REG: 2 VALUE: 0x001f INUM: 2 PC: 0x0004