# Berkeley EECS151 FPGA Labs and RISC-V CPU Project 

**_Note_**: This is a _private_ repo hosted on GitHub, however I'm using _GitFront_ to effectively make it unlisted (in order to share it privately with those who have the link without making the repo itself public). Official documentation for these projects can be found here:

+ https://github.com/EECS150/fpga_labs_fa20
+ https://github.com/EECS150/fpga_project_skeleton_fa20/blob/master/spec/project_spec.pdf

### Labs:     ![Progress](https://progress-bar.dev/100/)

### CPU:   ![Progress](https://progress-bar.dev/0/)