FPGA-RISC-V-CPU
/
hardware
/
sim
/
branch_comp_tb.tb.daidir
/
cc
/
cc_bcode.db
cc_bcode.db
Raw
sid branch_comp_tb bcid 0 0 WIDTH,1 CALL_ARG_VAL,2,0 CALL_ARG_VAL,3,0 M_LT RET