FPGA-RISC-V-CPU / hardware / sim / csrc / filelist
filelist
Raw

AR=ar
DOTLIBS=/share/instsww/synopsys-new/vcs/P-2019.06/linux64/lib/libvirsim.so /share/instsww/synopsys-new/vcs/P-2019.06/linux64/lib/liberrorinf.so /share/instsww/synopsys-new/vcs/P-2019.06/linux64/lib/libsnpsmalloc.so /share/instsww/synopsys-new/vcs/P-2019.06/linux64/lib/libvfs.so 

# This file is automatically generated by VCS. Any changes you make to it
# will be overwritten the next time VCS is run
VCS_LIBEXT=
XTRN_OBJS=

DPI_WRAPPER_OBJS = 
DPI_STUB_OBJS = 
# filelist.dpi will populate DPI_WRAPPER_OBJS and DPI_STUB_OBJS
include filelist.dpi
PLI_STUB_OBJS = 
include filelist.pli

include filelist.hsopt

include filelist.cu

VCS_INCR_OBJS=


AUGDIR=
AUG_LDFLAGS=
SHARED_OBJ_SO=



VLOG_OBJS= $(VCS_OBJS) $(CU_OBJS) $(VCS_ARC0) $(XTRN_OBJS) $(DPI_WRAPPER_OBJS) $(VCS_INCR_OBJS) $(SHARED_OBJ_SO) $(HSOPT_OBJS)