DLX-Microprocessor / components / g_block.vhd
g_block.vhd
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LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY G_BLOCK IS
  PORT (
    Pik, Gik, Gkj: IN STD_LOGIC;
    Gij: OUT STD_LOGIC
  );
END ENTITY;

ARCHITECTURE BEHAVIORAL OF G_BLOCK IS

BEGIN
  Gij <= Gik OR (Pik AND Gkj);
END ARCHITECTURE;