DLX-Microprocessor / physical_design / report_timing_preCTS.txt
report_timing_preCTS.txt
Raw
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#  Generated by:      Cadence Innovus 20.11-s130_1
#  OS:                Linux x86_64(Host ID localhost.localdomain)
#  Generated on:      Sat Jul 19 02:42:52 2025
#  Design:            DLX
#  Command:           report_timing > ./physical_design/report_timing_preCTS.txt
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Path 1: MET Recovery Check with Pin datapath_inst/write_mem_rf_inst/RD_out_
reg[4]/CK 
Endpoint:   datapath_inst/write_mem_rf_inst/RD_out_reg[4]/RN (^) checked with  
leading edge of 'clk'
Beginpoint: rst                                              (v) triggered by  
leading edge of '@'
Path Groups: {async_default}
Analysis View: default
Other End Arrival Time          0.000
- Recovery                      0.070
+ Phase Shift                   1.000
= Required Time                 0.930
- Arrival Time                  0.593
= Slack Time                    0.337
     Clock Rise Edge                      0.000
     + Input Delay                        0.000
     = Beginpoint Arrival Time            0.000
     +----------------------------------------------------------------------------------------------------+ 
     |                   Instance                    |     Arc     |  Cell   | Delay | Arrival | Required | 
     |                                               |             |         |       |  Time   |   Time   | 
     |-----------------------------------------------+-------------+---------+-------+---------+----------| 
     |                                               | rst v       |         |       |   0.000 |    0.337 | 
     | datapath_inst/FE_DBTC3_rst                    | A v -> ZN ^ | INV_X1  | 0.511 |   0.511 |    0.848 | 
     | datapath_inst/write_mem_rf_inst/RD_out_reg[4] | RN ^        | DFFR_X1 | 0.082 |   0.593 |    0.930 | 
     +----------------------------------------------------------------------------------------------------+