VERSION {1.0}
PTDEF {instance} {pin} {cell} {edge} {clock_edge} {clock} {phase}
BANNER
  {Module} {DLX}
  {Timing} {LATE}
  {Slew Propagation} {WORST}
  {Operating Condition} {typical}
  {PVT Mode} {max}
  {Tree Type} {balanced}
  {Process} {1.000}
  {Voltage} {1.100}
  {Temperature} {25.000}
  {time unit} {1.000 ns}
  {capacitance unit} {1.000 fF}
  {resistance unit} {1.000 MOhm}
  {TOOL} {v20.11-s130_1 ((64bit) 08/05/2020 15:53 (Linux 2.6.32-431.11.2.el6.x86_64))}
  {DATE} {July 19, 2025}
END_BANNER
PATH 1
  VIEW  default
  CHECK_TYPE {Setup Check}
  REF {CU_inst/alu_func_type_reg[2]} {CK}
  ENDPT {CU_inst/alu_func_type_reg[2]} {D} {DFF_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {datapath_inst/fetch_inst/IR_reg[26]} {Q} {DFFS_X1} {v} {leading} {clk} {clk(D)(P)(default)}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Setup} {0.028}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {0.968}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.299}
    {=} {Slack Time} {0.669}
  END_SLK_CLC
  SLK 0.669
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {0.588} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.008} {0.000} {0.008} {94.466} {-0.073} {0.596} {} {} {} 
    INST {CTS_ccl_a_buf_00128} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.066} {0.000} {0.043} {} {-0.007} {0.662} {} {41} {(118.24, 155.37) (118.61, 155.02)} 
    NET {} {} {} {} {} {CTS_2} {} {0.004} {0.000} {0.043} {53.274} {-0.003} {0.666} {} {} {} 
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    INST {datapath_inst/fetch_inst/IR_reg[26]} {CK} {^} {Q} {v} {} {DFFS_X1} {0.099} {0.000} {0.009} {} {0.096} {0.765} {} {3} {(107.73, 186.23) (109.59, 185.83)} 
    NET {} {} {} {} {} {datapath_inst/IR[26]} {} {0.000} {0.000} {0.009} {3.714} {0.096} {0.765} {} {} {} 
    INST {datapath_inst/U36} {A1} {v} {ZN} {v} {} {OR2_X1} {0.046} {0.000} {0.010} {} {0.143} {0.811} {} {2} {(115.20, 186.16) (115.75, 185.79)} 
    NET {} {} {} {} {} {IR[26]} {} {0.000} {0.000} {0.010} {2.883} {0.143} {0.811} {} {} {} 
    INST {CU_inst/U46} {A2} {v} {ZN} {^} {} {NOR2_X1} {0.062} {0.000} {0.046} {} {0.205} {0.874} {} {4} {(117.10, 186.16) (117.29, 185.79)} 
    NET {} {} {} {} {} {CU_inst/n32} {} {0.000} {0.000} {0.046} {8.490} {0.205} {0.874} {} {} {} 
    INST {CU_inst/U59} {A1} {^} {ZN} {v} {} {NAND3_X1} {0.031} {0.000} {0.020} {} {0.236} {0.905} {} {2} {(133.44, 187.91) (133.24, 187.64)} 
    NET {} {} {} {} {} {CU_inst/n24} {} {0.000} {0.000} {0.020} {2.775} {0.236} {0.905} {} {} {} 
    INST {CU_inst/U9} {A2} {v} {ZN} {v} {} {AND2_X1} {0.039} {0.000} {0.008} {} {0.276} {0.944} {} {2} {(137.43, 187.91) (137.79, 188.25)} 
    NET {} {} {} {} {} {CU_inst/n18} {} {0.000} {0.000} {0.008} {3.408} {0.276} {0.944} {} {} {} 
    INST {CU_inst/U5} {B1} {v} {ZN} {^} {} {AOI21_X1} {0.023} {0.000} {0.017} {} {0.299} {0.968} {} {1} {(136.97, 188.97) (137.10, 188.80)} 
    NET {} {} {} {} {} {CU_inst/n35} {} {0.000} {0.000} {0.017} {1.454} {0.299} {0.968} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.750} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.008} {0.000} {0.008} {94.466} {-0.073} {-0.742} {} {} {} 
    INST {CTS_ccl_a_buf_00134} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.043} {} {-0.008} {-0.677} {} {40} {(128.31, 158.16) (128.68, 157.82)} 
    NET {} {} {} {} {} {CTS_3} {} {0.005} {0.000} {0.043} {53.301} {-0.004} {-0.673} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 1
PATH 2
  VIEW  default
  CHECK_TYPE {Setup Check}
  REF {CU_inst/alu_func_type_reg[5]} {CK}
  ENDPT {CU_inst/alu_func_type_reg[5]} {D} {DFF_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {datapath_inst/fetch_inst/IR_reg[30]} {Q} {DFFS_X1} {v} {leading} {clk} {clk(D)(P)(default)}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Setup} {0.027}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {0.969}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.277}
    {=} {Slack Time} {0.693}
  END_SLK_CLC
  SLK 0.693
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {0.611} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.008} {0.000} {0.008} {94.466} {-0.073} {0.619} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00126} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.066} {0.000} {0.045} {} {-0.008} {0.685} {} {41} {(69.48, 179.52) (69.11, 179.86)} 
    NET {} {} {} {} {} {datapath_inst/CTS_1} {} {0.005} {0.000} {0.045} {55.115} {-0.003} {0.690} {} {} {} 
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    INST {datapath_inst/fetch_inst/IR_reg[30]} {CK} {^} {Q} {v} {} {DFFS_X1} {0.100} {0.000} {0.009} {} {0.097} {0.790} {} {4} {(109.06, 191.83) (110.92, 191.43)} 
    NET {} {} {} {} {} {datapath_inst/IR[30]} {} {0.000} {0.000} {0.009} {4.129} {0.097} {0.790} {} {} {} 
    INST {datapath_inst/U5} {A1} {v} {ZN} {v} {} {OR2_X1} {0.047} {0.000} {0.010} {} {0.145} {0.837} {} {2} {(113.68, 191.77) (114.23, 191.39)} 
    NET {} {} {} {} {} {IR[30]} {} {0.000} {0.000} {0.010} {3.196} {0.145} {0.837} {} {} {} 
    INST {CU_inst/U37} {A2} {v} {ZN} {^} {} {NOR2_X1} {0.060} {0.000} {0.044} {} {0.205} {0.897} {} {4} {(120.33, 191.77) (120.52, 191.39)} 
    NET {} {} {} {} {} {CU_inst/n29} {} {0.000} {0.000} {0.044} {8.013} {0.205} {0.898} {} {} {} 
    INST {CU_inst/FE_RC_159_0} {A1} {^} {ZN} {v} {} {NAND2_X1} {0.017} {0.000} {0.013} {} {0.222} {0.915} {} {1} {(131.30, 191.77) (131.16, 191.59)} 
    NET {} {} {} {} {} {CU_inst/n26} {} {0.000} {0.000} {0.013} {1.365} {0.222} {0.915} {} {} {} 
    INST {CU_inst/FE_RC_228_0} {A2} {v} {ZN} {v} {} {AND2_X1} {0.036} {0.000} {0.008} {} {0.258} {0.951} {} {2} {(136.29, 191.77) (136.65, 191.43)} 
    NET {} {} {} {} {} {CU_inst/n22} {} {0.000} {0.000} {0.008} {3.507} {0.258} {0.951} {} {} {} 
    INST {CU_inst/U42} {A} {v} {ZN} {^} {} {OAI21_X1} {0.018} {0.000} {0.011} {} {0.277} {0.969} {} {1} {(136.60, 190.72) (136.93, 190.96)} 
    NET {} {} {} {} {} {CU_inst/N153} {} {0.000} {0.000} {0.011} {1.300} {0.277} {0.969} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.774} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.008} {0.000} {0.008} {94.466} {-0.073} {-0.765} {} {} {} 
    INST {CTS_ccl_a_buf_00134} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.043} {} {-0.008} {-0.701} {} {40} {(128.31, 158.16) (128.68, 157.82)} 
    NET {} {} {} {} {} {CTS_3} {} {0.005} {0.000} {0.043} {53.301} {-0.004} {-0.696} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 2
PATH 3
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.326}
    {=} {Slack Time} {0.720}
  END_SLK_CLC
  SLK 0.720
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.720} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.721} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.730} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.730} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.742} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.743} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.782} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.871} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.022} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.024} {0.000} {0.113} {137.345} {0.326} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.801} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.795} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.727} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.002} {0.000} {0.045} {56.493} {-0.004} {-0.725} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 3
PATH 4
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.326}
    {=} {Slack Time} {0.721}
  END_SLK_CLC
  SLK 0.721
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.721} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.722} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.731} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.731} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.743} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.783} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.872} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.023} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.024} {0.000} {0.113} {137.345} {0.326} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.803} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.796} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.728} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.003} {0.000} {0.045} {56.493} {-0.003} {-0.725} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 4
PATH 5
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_7/Q_reg[1]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_7/Q_reg[1]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.326}
    {=} {Slack Time} {0.721}
  END_SLK_CLC
  SLK 0.721
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.721} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.722} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.731} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.731} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.743} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.783} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.872} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.023} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.024} {0.000} {0.113} {137.345} {0.326} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.803} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.796} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.728} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.003} {0.000} {0.045} {56.493} {-0.003} {-0.725} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 5
PATH 6
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_13/Q_reg[1]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_13/Q_reg[1]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.326}
    {=} {Slack Time} {0.722}
  END_SLK_CLC
  SLK 0.722
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.722} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.722} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.732} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.732} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.744} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.783} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.872} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.023} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.024} {0.000} {0.113} {137.345} {0.326} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.803} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.796} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.728} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.003} {0.000} {0.045} {56.493} {-0.003} {-0.725} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 6
PATH 7
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.326}
    {=} {Slack Time} {0.722}
  END_SLK_CLC
  SLK 0.722
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.722} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.722} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.732} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.732} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.744} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.783} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.872} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.023} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.024} {0.000} {0.113} {137.345} {0.326} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.803} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.797} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.728} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.003} {0.000} {0.045} {56.493} {-0.003} {-0.725} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 7
PATH 8
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.325}
    {=} {Slack Time} {0.722}
  END_SLK_CLC
  SLK 0.722
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.722} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.723} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.732} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.732} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.744} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.783} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.872} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.023} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.024} {0.000} {0.113} {137.345} {0.325} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.803} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.797} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.728} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.003} {0.000} {0.045} {56.493} {-0.003} {-0.725} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 8
PATH 9
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[8]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[8]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.326}
    {=} {Slack Time} {0.722}
  END_SLK_CLC
  SLK 0.722
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.722} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.723} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.732} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.732} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.744} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.783} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.872} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.023} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.024} {0.000} {0.113} {137.345} {0.326} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.803} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.797} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.728} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.003} {0.000} {0.045} {56.493} {-0.003} {-0.725} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 9
PATH 10
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[2]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[2]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.326}
    {=} {Slack Time} {0.722}
  END_SLK_CLC
  SLK 0.722
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.722} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.723} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.732} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.732} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.744} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.783} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.872} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.023} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.024} {0.000} {0.113} {137.345} {0.326} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.803} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.797} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.728} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.003} {0.000} {0.045} {56.493} {-0.003} {-0.725} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 10
PATH 11
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[2]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[2]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.326}
    {=} {Slack Time} {0.722}
  END_SLK_CLC
  SLK 0.722
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.722} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.723} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.732} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.732} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.744} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.784} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.873} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.023} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.025} {0.000} {0.113} {137.345} {0.326} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.803} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.797} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.729} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.004} {0.000} {0.045} {56.493} {-0.003} {-0.725} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 11
PATH 12
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[8]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[8]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.326}
    {=} {Slack Time} {0.722}
  END_SLK_CLC
  SLK 0.722
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.722} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.723} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.732} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.732} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.744} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.745} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.784} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.873} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.024} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.024} {0.000} {0.113} {137.345} {0.326} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.803} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.797} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.729} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.004} {0.000} {0.045} {56.493} {-0.002} {-0.725} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 12
PATH 13
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_4/Q_reg[8]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_4/Q_reg[8]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.324}
    {=} {Slack Time} {0.725}
  END_SLK_CLC
  SLK 0.725
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.725} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.726} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.735} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.735} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.747} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.787} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.876} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.026} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.022} {0.000} {0.113} {137.345} {0.324} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.806} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.800} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.731} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.005} {0.000} {0.045} {56.493} {-0.002} {-0.727} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 13
PATH 14
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_9/Q_reg[1]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_9/Q_reg[1]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.006}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.045}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.320}
    {=} {Slack Time} {0.725}
  END_SLK_CLC
  SLK 0.725
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.725} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.726} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.735} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.735} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.747} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.787} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.876} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.026} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.018} {0.000} {0.113} {137.345} {0.320} {1.045} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.806} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.800} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.731} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.001} {0.000} {0.045} {56.493} {-0.006} {-0.731} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 14
PATH 15
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_4/Q_reg[2]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_4/Q_reg[2]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.324}
    {=} {Slack Time} {0.725}
  END_SLK_CLC
  SLK 0.725
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.725} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.726} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.735} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.735} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.747} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.787} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.876} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.026} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.022} {0.000} {0.113} {137.345} {0.324} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.806} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.800} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.732} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.005} {0.000} {0.045} {56.493} {-0.002} {-0.727} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 15
PATH 16
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_12/Q_reg[2]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_12/Q_reg[2]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.324}
    {=} {Slack Time} {0.725}
  END_SLK_CLC
  SLK 0.725
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.725} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.726} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.735} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.735} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.747} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.787} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.876} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.026} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.022} {0.000} {0.113} {137.345} {0.324} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.806} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.800} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.732} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.005} {0.000} {0.045} {56.493} {-0.002} {-0.727} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 16
PATH 17
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_1/Q_reg[2]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_1/Q_reg[2]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.324}
    {=} {Slack Time} {0.725}
  END_SLK_CLC
  SLK 0.725
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.725} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.726} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.735} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.735} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.747} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.787} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.876} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.027} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.022} {0.000} {0.113} {137.345} {0.324} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.806} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.800} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.732} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.005} {0.000} {0.045} {56.493} {-0.002} {-0.727} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 17
PATH 18
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_12/Q_reg[8]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_12/Q_reg[8]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.323}
    {=} {Slack Time} {0.725}
  END_SLK_CLC
  SLK 0.725
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.725} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.726} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.735} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.735} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.747} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.787} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.876} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.027} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.022} {0.000} {0.113} {137.345} {0.323} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.806} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.800} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.732} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.005} {0.000} {0.045} {56.493} {-0.002} {-0.727} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 18
PATH 19
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_1/Q_reg[8]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_1/Q_reg[8]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.323}
    {=} {Slack Time} {0.725}
  END_SLK_CLC
  SLK 0.725
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.725} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.726} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.735} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.735} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.747} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.787} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.876} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.027} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.022} {0.000} {0.113} {137.345} {0.323} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.806} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.800} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.732} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.005} {0.000} {0.045} {56.493} {-0.002} {-0.727} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 19
PATH 20
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_15/Q_reg[8]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_15/Q_reg[8]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.323}
    {=} {Slack Time} {0.725}
  END_SLK_CLC
  SLK 0.725
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.725} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.726} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.735} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.735} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.747} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.787} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.876} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.027} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.022} {0.000} {0.113} {137.345} {0.323} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.806} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.800} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.732} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.005} {0.000} {0.045} {56.493} {-0.002} {-0.727} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 20
PATH 21
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_1/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_1/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.323}
    {=} {Slack Time} {0.725}
  END_SLK_CLC
  SLK 0.725
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.725} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.726} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.735} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.735} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.747} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.787} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.876} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.027} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.022} {0.000} {0.113} {137.345} {0.323} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.806} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.800} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.732} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.005} {0.000} {0.045} {56.493} {-0.002} {-0.727} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 21
PATH 22
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_15/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_15/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.323}
    {=} {Slack Time} {0.725}
  END_SLK_CLC
  SLK 0.725
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.725} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.726} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.735} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.735} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.747} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.787} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.876} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.027} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.022} {0.000} {0.113} {137.345} {0.323} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.806} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.800} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.732} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.005} {0.000} {0.045} {56.493} {-0.002} {-0.727} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 22
PATH 23
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.045}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.320}
    {=} {Slack Time} {0.725}
  END_SLK_CLC
  SLK 0.725
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.725} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.726} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.735} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.735} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.747} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.787} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.876} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.027} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.018} {0.000} {0.113} {137.345} {0.320} {1.045} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.807} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.800} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.732} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.001} {0.000} {0.045} {56.493} {-0.005} {-0.731} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 23
PATH 24
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_5/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_5/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.323}
    {=} {Slack Time} {0.726}
  END_SLK_CLC
  SLK 0.726
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.726} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.727} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.736} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.736} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.748} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.787} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.876} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.027} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.022} {0.000} {0.113} {137.345} {0.323} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.807} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.801} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.732} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.005} {0.000} {0.045} {56.493} {-0.002} {-0.727} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 24
PATH 25
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_13/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_13/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.323}
    {=} {Slack Time} {0.726}
  END_SLK_CLC
  SLK 0.726
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.726} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.727} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.736} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.736} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.748} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.788} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.876} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.027} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.021} {0.000} {0.113} {137.345} {0.323} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.807} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.801} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.732} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.005} {0.000} {0.045} {56.493} {-0.002} {-0.728} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 25
PATH 26
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_7/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_7/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.322}
    {=} {Slack Time} {0.726}
  END_SLK_CLC
  SLK 0.726
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.726} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.727} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.736} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.736} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.748} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.788} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.877} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.028} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.021} {0.000} {0.113} {137.345} {0.322} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.807} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.801} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.733} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.005} {0.000} {0.045} {56.493} {-0.002} {-0.728} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 26
PATH 27
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.322}
    {=} {Slack Time} {0.726}
  END_SLK_CLC
  SLK 0.726
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.726} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.727} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.736} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.736} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.748} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.788} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.877} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.028} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.020} {0.000} {0.113} {137.345} {0.322} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.807} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.801} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.731} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.003} {0.000} {0.045} {56.871} {-0.002} {-0.729} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 27
PATH 28
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_9/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_9/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.322}
    {=} {Slack Time} {0.727}
  END_SLK_CLC
  SLK 0.727
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.727} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.727} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.737} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.737} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.749} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.788} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.877} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.028} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.020} {0.000} {0.113} {137.345} {0.322} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.808} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.801} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.732} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.003} {0.000} {0.045} {56.871} {-0.002} {-0.729} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 28
PATH 29
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_4/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_4/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.322}
    {=} {Slack Time} {0.727}
  END_SLK_CLC
  SLK 0.727
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.727} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.727} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.737} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.737} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.749} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.788} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.877} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.028} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.021} {0.000} {0.113} {137.345} {0.322} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.808} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.801} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.733} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.005} {0.000} {0.045} {56.493} {-0.002} {-0.728} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 29
PATH 30
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_12/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_12/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.322}
    {=} {Slack Time} {0.727}
  END_SLK_CLC
  SLK 0.727
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.727} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.728} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.737} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.737} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.749} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.788} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.877} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.028} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.021} {0.000} {0.113} {137.345} {0.322} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.808} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.802} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00096} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.045} {} {-0.006} {-0.733} {} {42} {(74.61, 87.11) (74.25, 87.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_8} {} {0.005} {0.000} {0.045} {56.493} {-0.002} {-0.728} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 30
PATH 31
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_22/Q_reg[4]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_22/Q_reg[4]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.319}
    {=} {Slack Time} {0.727}
  END_SLK_CLC
  SLK 0.727
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.727} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.728} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.737} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.737} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.749} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.789} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.878} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.028} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.018} {0.000} {0.113} {137.345} {0.319} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.808} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.802} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.732} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.001} {0.000} {0.045} {56.871} {-0.004} {-0.731} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 31
PATH 32
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_22/Q_reg[5]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_22/Q_reg[5]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.319}
    {=} {Slack Time} {0.727}
  END_SLK_CLC
  SLK 0.727
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.727} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.728} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.737} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.737} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.749} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.789} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.878} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.028} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.018} {0.000} {0.113} {137.345} {0.319} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.808} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.802} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.732} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.001} {0.000} {0.045} {56.871} {-0.004} {-0.731} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 32
PATH 33
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_0/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_0/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.321}
    {=} {Slack Time} {0.727}
  END_SLK_CLC
  SLK 0.727
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.727} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.728} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.737} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.737} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.749} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.750} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.789} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.878} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.029} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.019} {0.000} {0.113} {137.345} {0.321} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.808} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.802} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.732} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.003} {0.000} {0.045} {56.871} {-0.002} {-0.730} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 33
PATH 34
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_16/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_16/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.319}
    {=} {Slack Time} {0.727}
  END_SLK_CLC
  SLK 0.727
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.727} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.728} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.737} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.737} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.749} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.750} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.789} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.878} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.029} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.017} {0.000} {0.113} {137.345} {0.319} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.809} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.802} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.732} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.001} {0.000} {0.045} {56.871} {-0.004} {-0.732} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 34
PATH 35
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_17/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_17/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.319}
    {=} {Slack Time} {0.728}
  END_SLK_CLC
  SLK 0.728
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.728} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.728} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.738} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.738} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.750} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.750} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.789} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.878} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.029} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.017} {0.000} {0.113} {137.345} {0.319} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.809} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.802} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.733} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.001} {0.000} {0.045} {56.871} {-0.004} {-0.732} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 35
PATH 36
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.318}
    {=} {Slack Time} {0.728}
  END_SLK_CLC
  SLK 0.728
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.728} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.728} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.738} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.738} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.750} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.750} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.789} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.878} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.029} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.017} {0.000} {0.113} {137.345} {0.318} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.809} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.803} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.733} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.001} {0.000} {0.045} {56.871} {-0.004} {-0.732} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 36
PATH 37
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_16/Q_reg[5]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_16/Q_reg[5]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.001}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.050}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.319}
    {=} {Slack Time} {0.730}
  END_SLK_CLC
  SLK 0.730
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.730} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.731} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.740} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.740} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.752} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.752} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.792} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.881} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.031} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.018} {0.000} {0.113} {137.345} {0.319} {1.050} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.811} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.805} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00102} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.073} {0.000} {0.047} {} {-0.002} {-0.732} {} {45} {(70.43, 101.12) (70.06, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_10} {} {0.001} {0.000} {0.047} {59.971} {-0.001} {-0.731} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 37
PATH 38
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_2/Q_reg[1]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_2/Q_reg[1]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.001}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.050}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.319}
    {=} {Slack Time} {0.730}
  END_SLK_CLC
  SLK 0.730
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.730} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.731} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.740} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.740} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.752} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.792} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.881} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.032} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.018} {0.000} {0.113} {137.345} {0.319} {1.050} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.811} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.806} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00102} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.073} {0.000} {0.047} {} {-0.002} {-0.732} {} {45} {(70.43, 101.12) (70.06, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_10} {} {0.001} {0.000} {0.047} {59.971} {-0.001} {-0.731} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 38
PATH 39
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_16/Q_reg[9]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_16/Q_reg[9]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.050}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.316}
    {=} {Slack Time} {0.730}
  END_SLK_CLC
  SLK 0.730
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.730} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.731} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.740} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.740} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.752} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.792} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.881} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.032} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.015} {0.000} {0.113} {137.345} {0.316} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.811} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.805} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.735} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.001} {0.000} {0.045} {56.871} {-0.004} {-0.735} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 39
PATH 40
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_8/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_8/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.001}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.050}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.319}
    {=} {Slack Time} {0.730}
  END_SLK_CLC
  SLK 0.730
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.730} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.731} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.740} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.740} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.752} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.792} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.881} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.032} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.018} {0.000} {0.113} {137.345} {0.319} {1.050} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.812} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.806} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00102} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.073} {0.000} {0.047} {} {-0.002} {-0.732} {} {45} {(70.43, 101.12) (70.06, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_10} {} {0.001} {0.000} {0.047} {59.971} {-0.001} {-0.731} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 40
PATH 41
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_16/Q_reg[4]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_16/Q_reg[4]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.001}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.050}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.319}
    {=} {Slack Time} {0.730}
  END_SLK_CLC
  SLK 0.730
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.730} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.731} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.740} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.740} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.752} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.792} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.881} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.032} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.018} {0.000} {0.113} {137.345} {0.319} {1.050} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.812} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.806} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00102} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.073} {0.000} {0.047} {} {-0.002} {-0.732} {} {45} {(70.43, 101.12) (70.06, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_10} {} {0.001} {0.000} {0.047} {59.971} {-0.001} {-0.731} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 41
PATH 42
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_17/Q_reg[5]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_17/Q_reg[5]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.001}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.050}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.319}
    {=} {Slack Time} {0.731}
  END_SLK_CLC
  SLK 0.731
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.731} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.731} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.741} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.741} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.753} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.792} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.881} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.032} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.018} {0.000} {0.113} {137.345} {0.319} {1.050} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.812} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.806} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00102} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.073} {0.000} {0.047} {} {-0.002} {-0.732} {} {45} {(70.43, 101.12) (70.06, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_10} {} {0.001} {0.000} {0.047} {59.971} {-0.001} {-0.731} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 42
PATH 43
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_2/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_2/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.001}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.050}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.319}
    {=} {Slack Time} {0.731}
  END_SLK_CLC
  SLK 0.731
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.731} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.731} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.741} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.741} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.753} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.792} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.881} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.032} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.018} {0.000} {0.113} {137.345} {0.319} {1.050} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.812} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.806} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00102} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.073} {0.000} {0.047} {} {-0.002} {-0.733} {} {45} {(70.43, 101.12) (70.06, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_10} {} {0.001} {0.000} {0.047} {59.971} {-0.001} {-0.732} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 43
PATH 44
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[25]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[25]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.316}
    {=} {Slack Time} {0.732}
  END_SLK_CLC
  SLK 0.732
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.732} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.733} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.742} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.754} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.754} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.794} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.881} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.020} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.028} {0.000} {0.104} {121.485} {0.316} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.813} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.004} {0.000} {0.006} {94.466} {-0.077} {-0.809} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00098} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.046} {} {-0.008} {-0.740} {} {43} {(28.06, 59.12) (27.70, 59.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_9} {} {0.004} {0.000} {0.046} {57.011} {-0.004} {-0.736} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 44
PATH 45
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[25]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[25]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.316}
    {=} {Slack Time} {0.732}
  END_SLK_CLC
  SLK 0.732
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.732} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.733} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.742} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.754} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.754} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.794} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.881} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.020} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.028} {0.000} {0.104} {121.485} {0.316} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.813} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.004} {0.000} {0.006} {94.466} {-0.077} {-0.809} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00098} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.046} {} {-0.008} {-0.740} {} {43} {(28.06, 59.12) (27.70, 59.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_9} {} {0.004} {0.000} {0.046} {57.011} {-0.004} {-0.736} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 45
PATH 46
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[25]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[25]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.316}
    {=} {Slack Time} {0.732}
  END_SLK_CLC
  SLK 0.732
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.732} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.733} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.742} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.754} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.754} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.794} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.881} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.020} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.028} {0.000} {0.104} {121.485} {0.316} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.813} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.004} {0.000} {0.006} {94.466} {-0.077} {-0.809} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00098} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.046} {} {-0.008} {-0.740} {} {43} {(28.06, 59.12) (27.70, 59.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_9} {} {0.004} {0.000} {0.046} {57.011} {-0.004} {-0.736} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 46
PATH 47
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[25]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[25]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.316}
    {=} {Slack Time} {0.732}
  END_SLK_CLC
  SLK 0.732
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.732} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.733} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.742} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.754} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.754} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.794} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.881} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.020} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.028} {0.000} {0.104} {121.485} {0.316} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.813} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.004} {0.000} {0.006} {94.466} {-0.077} {-0.809} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00098} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.046} {} {-0.008} {-0.740} {} {43} {(28.06, 59.12) (27.70, 59.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_9} {} {0.004} {0.000} {0.046} {57.011} {-0.004} {-0.736} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 47
PATH 48
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_9/Q_reg[31]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_9/Q_reg[31]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.316}
    {=} {Slack Time} {0.732}
  END_SLK_CLC
  SLK 0.732
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.732} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.733} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.742} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.754} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.754} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.794} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.882} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.020} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.028} {0.000} {0.104} {121.485} {0.316} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.813} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.809} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00106} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.067} {0.000} {0.046} {} {-0.009} {-0.741} {} {43} {(28.44, 42.31) (28.07, 42.66)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_12} {} {0.005} {0.000} {0.046} {56.640} {-0.004} {-0.737} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 48
PATH 49
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_22/Q_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_22/Q_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.314}
    {=} {Slack Time} {0.732}
  END_SLK_CLC
  SLK 0.732
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.732} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.733} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.742} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.754} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.755} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.794} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.883} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.034} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.013} {0.000} {0.113} {137.345} {0.314} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.813} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.807} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.737} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.001} {0.000} {0.045} {56.871} {-0.004} {-0.736} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 49
PATH 50
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[25]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[25]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.316}
    {=} {Slack Time} {0.732}
  END_SLK_CLC
  SLK 0.732
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.732} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.733} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.742} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.754} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.755} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.794} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.882} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.020} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.028} {0.000} {0.104} {121.485} {0.316} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.813} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.004} {0.000} {0.006} {94.466} {-0.077} {-0.809} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00098} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.046} {} {-0.008} {-0.740} {} {43} {(28.06, 59.12) (27.70, 59.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_9} {} {0.004} {0.000} {0.046} {57.011} {-0.004} {-0.736} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 50
PATH 51
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_0/Q_reg[7]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_0/Q_reg[7]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.316}
    {=} {Slack Time} {0.732}
  END_SLK_CLC
  SLK 0.732
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.732} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.733} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.742} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.754} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.755} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.794} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.882} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.020} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.028} {0.000} {0.104} {121.485} {0.316} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.813} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.809} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00106} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.067} {0.000} {0.046} {} {-0.009} {-0.741} {} {43} {(28.44, 42.31) (28.07, 42.66)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_12} {} {0.005} {0.000} {0.046} {56.640} {-0.004} {-0.737} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 51
PATH 52
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[28]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[28]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.316}
    {=} {Slack Time} {0.732}
  END_SLK_CLC
  SLK 0.732
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.732} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.733} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.742} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.754} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.755} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.794} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.882} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.020} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.028} {0.000} {0.104} {121.485} {0.316} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.813} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.809} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00106} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.067} {0.000} {0.046} {} {-0.009} {-0.741} {} {43} {(28.44, 42.31) (28.07, 42.66)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_12} {} {0.005} {0.000} {0.046} {56.640} {-0.004} {-0.737} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 52
PATH 53
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[7]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[7]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.316}
    {=} {Slack Time} {0.732}
  END_SLK_CLC
  SLK 0.732
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.732} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.733} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.742} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.754} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.755} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.794} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.882} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.020} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.028} {0.000} {0.104} {121.485} {0.316} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.814} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.809} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00106} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.067} {0.000} {0.046} {} {-0.009} {-0.742} {} {43} {(28.44, 42.31) (28.07, 42.66)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_12} {} {0.005} {0.000} {0.046} {56.640} {-0.004} {-0.737} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 53
PATH 54
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[7]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[7]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.316}
    {=} {Slack Time} {0.732}
  END_SLK_CLC
  SLK 0.732
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.732} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.733} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.742} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.754} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.755} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.794} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.882} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.020} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.028} {0.000} {0.104} {121.485} {0.316} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.814} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.809} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00106} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.067} {0.000} {0.046} {} {-0.009} {-0.742} {} {43} {(28.44, 42.31) (28.07, 42.66)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_12} {} {0.005} {0.000} {0.046} {56.640} {-0.004} {-0.737} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 54
PATH 55
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_12/Q_reg[27]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_12/Q_reg[27]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.316}
    {=} {Slack Time} {0.732}
  END_SLK_CLC
  SLK 0.732
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.732} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.733} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.742} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.754} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.755} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.794} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.882} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.021} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.028} {0.000} {0.104} {121.485} {0.316} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.814} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.004} {0.000} {0.006} {94.466} {-0.077} {-0.809} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00098} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.046} {} {-0.008} {-0.740} {} {43} {(28.06, 59.12) (27.70, 59.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_9} {} {0.004} {0.000} {0.046} {57.011} {-0.004} {-0.737} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 55
PATH 56
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[27]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[27]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.316}
    {=} {Slack Time} {0.732}
  END_SLK_CLC
  SLK 0.732
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.732} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.733} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.742} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.754} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.755} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.794} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.882} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.021} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.028} {0.000} {0.104} {121.485} {0.316} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.814} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.809} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00106} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.067} {0.000} {0.046} {} {-0.009} {-0.742} {} {43} {(28.44, 42.31) (28.07, 42.66)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_12} {} {0.005} {0.000} {0.046} {56.640} {-0.004} {-0.737} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 56
PATH 57
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_4/Q_reg[7]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_4/Q_reg[7]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.316}
    {=} {Slack Time} {0.733}
  END_SLK_CLC
  SLK 0.733
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.733} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.733} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.743} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.743} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.755} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.755} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.794} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.882} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.021} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.028} {0.000} {0.104} {121.485} {0.316} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.814} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.004} {0.000} {0.006} {94.466} {-0.077} {-0.809} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00098} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.046} {} {-0.008} {-0.741} {} {43} {(28.06, 59.12) (27.70, 59.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_9} {} {0.004} {0.000} {0.046} {57.011} {-0.004} {-0.737} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 57
PATH 58
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_0/Q_reg[11]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_0/Q_reg[11]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.315}
    {=} {Slack Time} {0.733}
  END_SLK_CLC
  SLK 0.733
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.733} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.734} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.743} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.743} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.755} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.755} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.795} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.882} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.021} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.027} {0.000} {0.104} {121.485} {0.315} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.814} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.004} {0.000} {0.006} {94.466} {-0.077} {-0.810} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00098} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.046} {} {-0.008} {-0.741} {} {43} {(28.06, 59.12) (27.70, 59.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_9} {} {0.003} {0.000} {0.046} {57.011} {-0.005} {-0.738} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 58
PATH 59
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[11]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[11]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.315}
    {=} {Slack Time} {0.733}
  END_SLK_CLC
  SLK 0.733
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.733} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.734} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.743} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.743} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.755} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.756} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.795} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.883} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.021} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.027} {0.000} {0.104} {121.485} {0.315} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.815} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.004} {0.000} {0.006} {94.466} {-0.077} {-0.810} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00098} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.046} {} {-0.008} {-0.741} {} {43} {(28.06, 59.12) (27.70, 59.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_9} {} {0.004} {0.000} {0.046} {57.011} {-0.004} {-0.738} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 59
PATH 60
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_4/Q_reg[27]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_4/Q_reg[27]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.316}
    {=} {Slack Time} {0.733}
  END_SLK_CLC
  SLK 0.733
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.733} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.734} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.743} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.743} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.755} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.756} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.795} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.883} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.022} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.027} {0.000} {0.104} {121.485} {0.316} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.815} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.808} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.738} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.001} {0.000} {0.044} {55.718} {-0.003} {-0.737} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 60
PATH 61
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[11]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[11]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.315}
    {=} {Slack Time} {0.733}
  END_SLK_CLC
  SLK 0.733
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.733} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.734} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.743} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.743} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.755} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.756} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.795} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.883} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.022} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.027} {0.000} {0.104} {121.485} {0.315} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.815} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.004} {0.000} {0.006} {94.466} {-0.077} {-0.810} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00098} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.046} {} {-0.008} {-0.741} {} {43} {(28.06, 59.12) (27.70, 59.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_9} {} {0.004} {0.000} {0.046} {57.011} {-0.004} {-0.738} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 61
PATH 62
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[11]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[11]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.315}
    {=} {Slack Time} {0.734}
  END_SLK_CLC
  SLK 0.734
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.734} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.735} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.744} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.756} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.756} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.795} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.883} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.022} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.026} {0.000} {0.104} {121.485} {0.315} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.815} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.004} {0.000} {0.006} {94.466} {-0.077} {-0.811} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00098} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.046} {} {-0.008} {-0.742} {} {43} {(28.06, 59.12) (27.70, 59.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_9} {} {0.004} {0.000} {0.046} {57.011} {-0.004} {-0.738} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 62
PATH 63
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[11]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[11]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.315}
    {=} {Slack Time} {0.734}
  END_SLK_CLC
  SLK 0.734
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.734} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.735} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.744} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.756} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.756} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.796} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.883} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.022} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.027} {0.000} {0.104} {121.485} {0.315} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.815} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.809} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.738} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.001} {0.000} {0.044} {55.718} {-0.003} {-0.737} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 63
PATH 64
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[11]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[11]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.314}
    {=} {Slack Time} {0.735}
  END_SLK_CLC
  SLK 0.735
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.735} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.736} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.745} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.745} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.757} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.757} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.797} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.884} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.023} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.026} {0.000} {0.103} {121.485} {0.314} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.816} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.810} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.740} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.001} {0.000} {0.044} {55.718} {-0.003} {-0.738} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 64
PATH 65
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_17/Q_reg[9]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_17/Q_reg[9]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.312}
    {=} {Slack Time} {0.735}
  END_SLK_CLC
  SLK 0.735
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.735} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.736} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.745} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.745} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.757} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.797} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.886} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.037} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.011} {0.000} {0.113} {137.345} {0.312} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.816} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.810} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.740} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.002} {0.000} {0.045} {56.871} {-0.003} {-0.739} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 65
PATH 66
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_0/Q_reg[10]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_0/Q_reg[10]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.313}
    {=} {Slack Time} {0.735}
  END_SLK_CLC
  SLK 0.735
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.735} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.736} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.745} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.745} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.757} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.797} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.885} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.024} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.025} {0.000} {0.103} {121.485} {0.313} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.817} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.810} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.740} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.001} {0.000} {0.044} {55.718} {-0.003} {-0.739} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 66
PATH 67
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[10]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[10]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.313}
    {=} {Slack Time} {0.736}
  END_SLK_CLC
  SLK 0.736
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.736} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.736} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.746} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.746} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.758} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.797} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.885} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.024} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.025} {0.000} {0.103} {121.485} {0.313} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.817} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.810} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.740} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.001} {0.000} {0.044} {55.718} {-0.003} {-0.739} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 67
PATH 68
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_12/Q_reg[7]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_12/Q_reg[7]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.313}
    {=} {Slack Time} {0.736}
  END_SLK_CLC
  SLK 0.736
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.736} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.736} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.746} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.746} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.758} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.797} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.885} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.024} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.025} {0.000} {0.103} {121.485} {0.313} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.817} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.810} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.740} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.001} {0.000} {0.044} {55.718} {-0.003} {-0.739} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 68
PATH 69
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_9/Q_reg[10]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_9/Q_reg[10]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.313}
    {=} {Slack Time} {0.736}
  END_SLK_CLC
  SLK 0.736
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.736} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.736} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.746} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.746} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.758} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.797} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.885} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.024} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.025} {0.000} {0.103} {121.485} {0.313} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.817} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.810} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.740} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.001} {0.000} {0.044} {55.718} {-0.003} {-0.739} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 69
PATH 70
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[10]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[10]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.313}
    {=} {Slack Time} {0.736}
  END_SLK_CLC
  SLK 0.736
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.736} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.736} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.746} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.746} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.758} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.797} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.885} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.024} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.025} {0.000} {0.103} {121.485} {0.313} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.817} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.810} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.740} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.001} {0.000} {0.044} {55.718} {-0.003} {-0.739} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 70
PATH 71
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[10]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[10]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.313}
    {=} {Slack Time} {0.736}
  END_SLK_CLC
  SLK 0.736
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.736} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.737} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.746} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.746} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.758} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.798} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.885} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.024} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.025} {0.000} {0.103} {121.485} {0.313} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.817} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.811} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.740} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.001} {0.000} {0.044} {55.718} {-0.003} {-0.739} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 71
PATH 72
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[10]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[10]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.313}
    {=} {Slack Time} {0.736}
  END_SLK_CLC
  SLK 0.736
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.736} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.737} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.746} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.746} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.758} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.798} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.886} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.024} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.025} {0.000} {0.103} {121.485} {0.313} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.817} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.811} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.741} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.001} {0.000} {0.044} {55.718} {-0.003} {-0.739} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 72
PATH 73
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[10]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[10]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.312}
    {=} {Slack Time} {0.737}
  END_SLK_CLC
  SLK 0.737
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.737} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.737} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.747} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.759} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.759} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.798} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.886} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.025} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.024} {0.000} {0.103} {121.485} {0.312} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.818} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.811} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.741} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.001} {0.000} {0.044} {55.718} {-0.003} {-0.740} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 73
PATH 74
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_9/Q_reg[7]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_9/Q_reg[7]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.312}
    {=} {Slack Time} {0.737}
  END_SLK_CLC
  SLK 0.737
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.737} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.737} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.747} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.759} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.759} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.798} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.886} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.025} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.024} {0.000} {0.103} {121.485} {0.312} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.818} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.813} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00106} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.067} {0.000} {0.046} {} {-0.009} {-0.746} {} {43} {(28.44, 42.31) (28.07, 42.66)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_12} {} {0.005} {0.000} {0.046} {56.640} {-0.004} {-0.741} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 74
PATH 75
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[31]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[31]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.312}
    {=} {Slack Time} {0.737}
  END_SLK_CLC
  SLK 0.737
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.737} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.738} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.747} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.759} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.759} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.798} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.886} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.025} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.024} {0.000} {0.103} {121.485} {0.312} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.818} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.813} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00106} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.067} {0.000} {0.046} {} {-0.009} {-0.746} {} {43} {(28.44, 42.31) (28.07, 42.66)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_12} {} {0.005} {0.000} {0.046} {56.640} {-0.004} {-0.741} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 75
PATH 76
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[31]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[31]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.004}
    {-} {Recovery} {-0.053}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.312}
    {=} {Slack Time} {0.737}
  END_SLK_CLC
  SLK 0.737
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.737} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.738} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.747} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.759} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.759} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.798} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.886} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.025} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.024} {0.000} {0.103} {121.485} {0.312} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.818} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.813} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00106} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.067} {0.000} {0.046} {} {-0.009} {-0.746} {} {43} {(28.44, 42.31) (28.07, 42.66)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_12} {} {0.005} {0.000} {0.046} {56.640} {-0.004} {-0.741} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 76
PATH 77
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_22/Q_reg[9]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_22/Q_reg[9]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.311}
    {=} {Slack Time} {0.737}
  END_SLK_CLC
  SLK 0.737
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.737} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.738} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.747} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.759} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.759} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.799} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.888} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.038} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.009} {0.000} {0.113} {137.345} {0.311} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.818} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.812} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.742} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.002} {0.000} {0.045} {56.871} {-0.003} {-0.740} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 77
PATH 78
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[12]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[12]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.310}
    {=} {Slack Time} {0.737}
  END_SLK_CLC
  SLK 0.737
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.737} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.738} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.747} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.759} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.760} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.799} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.887} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.025} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.022} {0.000} {0.103} {121.485} {0.310} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.818} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.812} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00110} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.044} {} {-0.007} {-0.744} {} {41} {(79.86, 65.77) (80.23, 65.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_14} {} {0.001} {0.000} {0.044} {55.119} {-0.005} {-0.743} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 78
PATH 79
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_4/Q_reg[31]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_4/Q_reg[31]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.312}
    {=} {Slack Time} {0.737}
  END_SLK_CLC
  SLK 0.737
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.737} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.738} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.747} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.759} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.760} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.799} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.887} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.025} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.024} {0.000} {0.103} {121.485} {0.312} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.818} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.812} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.742} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.001} {0.000} {0.044} {55.718} {-0.003} {-0.740} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 79
PATH 80
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_8/Q_reg[4]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_8/Q_reg[4]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.006}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.309}
    {=} {Slack Time} {0.737}
  END_SLK_CLC
  SLK 0.737
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.737} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.738} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.747} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.759} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.760} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.799} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.887} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.025} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.021} {0.000} {0.103} {121.485} {0.309} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.818} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.813} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00092} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.044} {} {-0.007} {-0.744} {} {43} {(71.19, 25.52) (70.83, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_6} {} {0.001} {0.000} {0.044} {55.670} {-0.006} {-0.743} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 80
PATH 81
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_9/Q_reg[6]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_9/Q_reg[6]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.006}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.309}
    {=} {Slack Time} {0.737}
  END_SLK_CLC
  SLK 0.737
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.737} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.738} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.747} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.759} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.760} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.799} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.887} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.025} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.021} {0.000} {0.103} {121.485} {0.309} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.818} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.813} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00092} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.044} {} {-0.007} {-0.744} {} {43} {(71.19, 25.52) (70.83, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_6} {} {0.001} {0.000} {0.044} {55.670} {-0.006} {-0.743} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 81
PATH 82
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[12]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[12]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.310}
    {=} {Slack Time} {0.737}
  END_SLK_CLC
  SLK 0.737
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.737} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.738} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.747} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.759} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.760} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.799} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.887} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.025} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.022} {0.000} {0.103} {121.485} {0.310} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.818} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.812} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00110} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.044} {} {-0.007} {-0.744} {} {41} {(79.86, 65.77) (80.23, 65.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_14} {} {0.001} {0.000} {0.044} {55.119} {-0.005} {-0.743} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 82
PATH 83
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_0/Q_reg[6]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_0/Q_reg[6]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.006}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.309}
    {=} {Slack Time} {0.737}
  END_SLK_CLC
  SLK 0.737
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.737} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.738} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.747} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.759} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.760} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.799} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.887} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.026} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.021} {0.000} {0.103} {121.485} {0.309} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.819} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.813} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00092} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.044} {} {-0.007} {-0.745} {} {43} {(71.19, 25.52) (70.83, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_6} {} {0.001} {0.000} {0.044} {55.670} {-0.006} {-0.743} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 83
PATH 84
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[12]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[12]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.310}
    {=} {Slack Time} {0.738}
  END_SLK_CLC
  SLK 0.738
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.738} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.738} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.748} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.760} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.760} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.799} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.887} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.026} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.021} {0.000} {0.103} {121.485} {0.310} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.819} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.812} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00110} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.044} {} {-0.007} {-0.744} {} {41} {(79.86, 65.77) (80.23, 65.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_14} {} {0.002} {0.000} {0.044} {55.119} {-0.005} {-0.743} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 84
PATH 85
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[4]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[4]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.309}
    {=} {Slack Time} {0.738}
  END_SLK_CLC
  SLK 0.738
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.738} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.738} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.748} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.760} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.760} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.799} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.887} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.026} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.021} {0.000} {0.103} {121.485} {0.309} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.819} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.812} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00110} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.044} {} {-0.007} {-0.744} {} {41} {(79.86, 65.77) (80.23, 65.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_14} {} {0.002} {0.000} {0.044} {55.119} {-0.005} {-0.743} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 85
PATH 86
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[4]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[4]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.309}
    {=} {Slack Time} {0.738}
  END_SLK_CLC
  SLK 0.738
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.738} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.738} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.748} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.760} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.760} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.799} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.887} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.026} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.021} {0.000} {0.103} {121.485} {0.309} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.819} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.812} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00110} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.044} {} {-0.007} {-0.744} {} {41} {(79.86, 65.77) (80.23, 65.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_14} {} {0.002} {0.000} {0.044} {55.119} {-0.005} {-0.743} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 86
PATH 87
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_12/Q_reg[31]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_12/Q_reg[31]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.311}
    {=} {Slack Time} {0.738}
  END_SLK_CLC
  SLK 0.738
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.738} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.738} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.748} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.760} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.760} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.799} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.887} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.026} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.023} {0.000} {0.103} {121.485} {0.311} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.819} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.812} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.742} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.001} {0.000} {0.044} {55.718} {-0.003} {-0.741} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 87
PATH 88
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[6]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_23/Q_reg[6]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.006}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.308}
    {=} {Slack Time} {0.738}
  END_SLK_CLC
  SLK 0.738
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.738} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.739} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.748} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.760} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.760} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.800} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.887} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.026} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.020} {0.000} {0.103} {121.485} {0.308} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.819} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.814} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00092} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.044} {} {-0.007} {-0.745} {} {43} {(71.19, 25.52) (70.83, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_6} {} {0.001} {0.000} {0.044} {55.670} {-0.006} {-0.744} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 88
PATH 89
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_2/Q_reg[4]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_2/Q_reg[4]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.309}
    {=} {Slack Time} {0.738}
  END_SLK_CLC
  SLK 0.738
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.738} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.739} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.748} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.760} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.761} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.800} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.888} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.027} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.021} {0.000} {0.103} {121.485} {0.309} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.820} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.814} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00092} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.044} {} {-0.007} {-0.746} {} {43} {(71.19, 25.52) (70.83, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_6} {} {0.002} {0.000} {0.044} {55.670} {-0.005} {-0.743} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 89
PATH 90
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[6]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[6]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.308}
    {=} {Slack Time} {0.739}
  END_SLK_CLC
  SLK 0.739
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.739} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.739} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.749} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.761} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.761} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.800} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.888} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.027} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.020} {0.000} {0.103} {121.485} {0.308} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.820} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.813} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00110} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.044} {} {-0.007} {-0.745} {} {41} {(79.86, 65.77) (80.23, 65.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_14} {} {0.002} {0.000} {0.044} {55.119} {-0.005} {-0.744} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 90
PATH 91
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_22/Q_reg[12]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_22/Q_reg[12]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.310}
    {=} {Slack Time} {0.739}
  END_SLK_CLC
  SLK 0.739
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.739} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.739} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.749} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.761} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.761} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.800} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.889} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.040} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.008} {0.000} {0.113} {137.345} {0.310} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.820} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.814} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.744} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.003} {0.000} {0.045} {56.871} {-0.002} {-0.741} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 91
PATH 92
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_12/Q_reg[6]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_12/Q_reg[6]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.310}
    {=} {Slack Time} {0.739}
  END_SLK_CLC
  SLK 0.739
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.739} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.740} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.749} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.761} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.761} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.801} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.888} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.027} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.022} {0.000} {0.103} {121.485} {0.310} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.820} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.814} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.744} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.001} {0.000} {0.044} {55.718} {-0.003} {-0.742} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 92
PATH 93
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_4/Q_reg[6]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_4/Q_reg[6]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.050}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.309}
    {=} {Slack Time} {0.740}
  END_SLK_CLC
  SLK 0.740
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.740} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.741} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.750} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.750} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.762} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.762} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.802} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.890} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.028} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.021} {0.000} {0.103} {121.485} {0.309} {1.050} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.821} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.815} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.745} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.002} {0.000} {0.044} {55.718} {-0.003} {-0.743} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 93
PATH 94
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[7]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[7]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.010}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.044}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.303}
    {=} {Slack Time} {0.741}
  END_SLK_CLC
  SLK 0.741
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.741} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.751} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.751} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.763} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.763} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.803} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.892} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.028} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.017} {0.000} {0.094} {112.530} {0.303} {1.044} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.822} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.817} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.752} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.001} {0.000} {0.045} {54.633} {-0.010} {-0.751} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 94
PATH 95
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_7/Q_reg[7]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_7/Q_reg[7]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.009}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.304}
    {=} {Slack Time} {0.741}
  END_SLK_CLC
  SLK 0.741
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.741} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.751} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.751} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.763} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.764} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.803} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.892} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.028} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.018} {0.000} {0.094} {112.530} {0.304} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.823} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.817} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.753} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.003} {0.000} {0.045} {54.633} {-0.009} {-0.750} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 95
PATH 96
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[7]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[7]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.007}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.742}
  END_SLK_CLC
  SLK 0.742
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.742} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.752} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.752} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.764} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.764} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.803} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.892} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.028} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.019} {0.000} {0.094} {112.530} {0.306} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.823} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.817} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.753} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.004} {0.000} {0.045} {54.633} {-0.007} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 96
PATH 97
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_5/Q_reg[7]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_5/Q_reg[7]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.008}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.305}
    {=} {Slack Time} {0.742}
  END_SLK_CLC
  SLK 0.742
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.742} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.752} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.752} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.764} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.764} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.803} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.892} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.028} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.018} {0.000} {0.094} {112.530} {0.305} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.823} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.817} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.753} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.003} {0.000} {0.045} {54.633} {-0.008} {-0.750} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 97
PATH 98
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[12]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[12]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.050}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.308}
    {=} {Slack Time} {0.742}
  END_SLK_CLC
  SLK 0.742
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.742} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.742} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.752} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.752} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.764} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.764} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.803} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.891} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.030} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.020} {0.000} {0.103} {121.485} {0.308} {1.050} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.823} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.816} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.746} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.002} {0.000} {0.044} {55.718} {-0.003} {-0.744} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 98
PATH 99
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[7]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[7]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.007}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.742}
  END_SLK_CLC
  SLK 0.742
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.742} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.743} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.752} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.752} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.764} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.764} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.803} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.892} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.028} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.019} {0.000} {0.094} {112.530} {0.306} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.823} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.817} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.753} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.004} {0.000} {0.045} {54.633} {-0.007} {-0.749} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 99
PATH 100
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/R_source_2_reg[4]} {CK}
  ENDPT {datapath_inst/decode_inst/R_source_2_reg[4]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.742}
  END_SLK_CLC
  SLK 0.742
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.742} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.743} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.752} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.752} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.764} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.764} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.804} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.892} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.043} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.005} {0.000} {0.112} {137.345} {0.306} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.823} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.817} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.747} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.002} {0.000} {0.045} {56.871} {-0.003} {-0.745} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 100
PATH 101
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[7]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[7]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.009}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.304}
    {=} {Slack Time} {0.742}
  END_SLK_CLC
  SLK 0.742
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.742} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.743} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.752} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.752} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.764} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.764} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.804} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.893} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.029} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.017} {0.000} {0.094} {112.530} {0.304} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.823} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.818} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.753} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.002} {0.000} {0.045} {54.633} {-0.009} {-0.751} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 101
PATH 102
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/R_source_1_reg[4]} {CK}
  ENDPT {datapath_inst/decode_inst/R_source_1_reg[4]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.742}
  END_SLK_CLC
  SLK 0.742
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.742} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.743} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.752} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.752} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.764} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.764} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.804} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.893} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.043} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.005} {0.000} {0.112} {137.345} {0.306} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.823} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.817} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.747} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.002} {0.000} {0.045} {56.871} {-0.003} {-0.745} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 102
PATH 103
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[12]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[12]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.050}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.308}
    {=} {Slack Time} {0.742}
  END_SLK_CLC
  SLK 0.742
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.742} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.743} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.752} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.752} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.764} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.764} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.804} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.891} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.030} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.019} {0.000} {0.103} {121.485} {0.308} {1.050} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.823} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.817} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.747} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.002} {0.000} {0.044} {55.718} {-0.003} {-0.745} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 103
PATH 104
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/R_source_2_reg[3]} {CK}
  ENDPT {datapath_inst/decode_inst/R_source_2_reg[3]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.002}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.742}
  END_SLK_CLC
  SLK 0.742
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.742} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.743} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.752} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.752} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.764} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.764} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.804} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.893} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC5_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.151} {0.000} {0.112} {} {0.301} {1.043} {} {68} {(101.33, 109.52) (101.70, 109.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN5_FE_DBTN2_rst} {} {0.005} {0.000} {0.112} {137.345} {0.306} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.823} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.817} {} {} {} 
    INST {datapath_inst/CTS_ccl_a_buf_00114} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.045} {} {-0.005} {-0.747} {} {43} {(88.67, 101.12) (88.31, 101.46)} 
    NET {} {} {} {} {} {datapath_inst/CTS_7} {} {0.003} {0.000} {0.045} {56.871} {-0.002} {-0.745} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 104
PATH 105
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_1/Q_reg[27]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_1/Q_reg[27]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.743} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.765} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.804} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.893} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.029} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.020} {0.000} {0.094} {112.530} {0.306} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.824} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.818} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.749} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.001} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 105
PATH 106
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_1/Q_reg[31]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_1/Q_reg[31]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.765} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.804} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.893} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.029} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.020} {0.000} {0.094} {112.530} {0.306} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.824} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.749} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.001} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 106
PATH 107
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[27]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[27]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.765} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.893} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.020} {0.000} {0.094} {112.530} {0.306} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.824} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.749} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.001} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 107
PATH 108
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_7/Q_reg[27]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_7/Q_reg[27]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.765} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.893} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.020} {0.000} {0.094} {112.530} {0.306} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.824} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.749} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.001} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 108
PATH 109
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[6]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[6]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.009}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.045}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.302}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.765} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.893} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.016} {0.000} {0.094} {112.530} {0.302} {1.045} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.824} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.754} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.002} {0.000} {0.045} {54.633} {-0.009} {-0.752} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 109
PATH 110
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_5/Q_reg[27]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_5/Q_reg[27]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.765} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.893} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.020} {0.000} {0.094} {112.530} {0.306} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.824} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.749} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.002} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 110
PATH 111
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[27]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[27]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.307}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.765} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.893} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.020} {0.000} {0.094} {112.530} {0.307} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.824} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.749} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.002} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 111
PATH 112
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[27]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[27]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.307}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.765} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.893} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.020} {0.000} {0.094} {112.530} {0.307} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.824} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.749} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.002} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 112
PATH 113
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[8]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[8]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.050}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.307}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.765} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.892} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.031} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.019} {0.000} {0.103} {121.485} {0.307} {1.050} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.824} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.818} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.748} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.002} {0.000} {0.044} {55.718} {-0.003} {-0.746} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 113
PATH 114
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_13/Q_reg[31]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_13/Q_reg[31]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.765} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.894} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.019} {0.000} {0.094} {112.530} {0.306} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.824} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.749} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.001} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 114
PATH 115
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[27]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[27]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.050}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.307}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.765} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.894} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.020} {0.000} {0.094} {112.530} {0.307} {1.050} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.824} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.749} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.002} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 115
PATH 116
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_5/Q_reg[31]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_5/Q_reg[31]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.766} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.894} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.019} {0.000} {0.094} {112.530} {0.306} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.824} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.750} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.001} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 116
PATH 117
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[31]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[31]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.050}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.766} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.894} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.019} {0.000} {0.094} {112.530} {0.306} {1.050} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.824} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.750} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.002} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 117
PATH 118
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[31]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[31]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.766} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.894} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.019} {0.000} {0.094} {112.530} {0.306} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.824} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.750} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.001} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 118
PATH 119
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_15/Q_reg[31]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_15/Q_reg[31]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.766} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.894} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.019} {0.000} {0.094} {112.530} {0.306} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.824} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.750} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.001} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 119
PATH 120
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[31]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[31]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.050}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.766} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.894} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.019} {0.000} {0.094} {112.530} {0.306} {1.050} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.825} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.750} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.002} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 120
PATH 121
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_7/Q_reg[31]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_7/Q_reg[31]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.766} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.894} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.019} {0.000} {0.094} {112.530} {0.306} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.825} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.750} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.001} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 121
PATH 122
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[31]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[31]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.743}
  END_SLK_CLC
  SLK 0.743
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.743} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.753} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.753} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.765} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.766} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.151} {0.894} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.019} {0.000} {0.094} {112.530} {0.306} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.825} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.750} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.001} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 122
PATH 123
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[7]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[7]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.050}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.744}
  END_SLK_CLC
  SLK 0.744
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.744} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.754} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.754} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.766} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.766} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.894} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.019} {0.000} {0.094} {112.530} {0.306} {1.050} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.825} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.750} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.002} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 123
PATH 124
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[31]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[31]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.050}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.744}
  END_SLK_CLC
  SLK 0.744
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.744} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.754} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.754} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.766} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.766} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.894} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.019} {0.000} {0.094} {112.530} {0.306} {1.050} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.825} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.750} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.002} {0.000} {0.043} {55.487} {-0.005} {-0.748} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 124
PATH 125
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_13/Q_reg[7]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_13/Q_reg[7]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.306}
    {=} {Slack Time} {0.744}
  END_SLK_CLC
  SLK 0.744
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.744} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.744} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.754} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.754} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.766} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.766} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.805} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.894} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.030} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.019} {0.000} {0.094} {112.530} {0.306} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.825} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.750} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.001} {0.000} {0.043} {55.487} {-0.005} {-0.749} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 125
PATH 126
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[8]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[8]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.305}
    {=} {Slack Time} {0.744}
  END_SLK_CLC
  SLK 0.744
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.744} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.745} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.754} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.754} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.766} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.767} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.806} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.894} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.032} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.017} {0.000} {0.103} {121.485} {0.305} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.826} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.819} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.749} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.002} {0.000} {0.044} {55.718} {-0.003} {-0.747} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 126
PATH 127
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_7/Q_reg[6]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_7/Q_reg[6]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.009}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.301}
    {=} {Slack Time} {0.745}
  END_SLK_CLC
  SLK 0.745
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.745} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.746} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.755} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.755} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.767} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.767} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.806} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.895} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.031} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.014} {0.000} {0.094} {112.530} {0.301} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.826} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.820} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.756} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.003} {0.000} {0.045} {54.633} {-0.009} {-0.753} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 127
PATH 128
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_15/Q_reg[7]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_15/Q_reg[7]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.054}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.303}
    {=} {Slack Time} {0.746}
  END_SLK_CLC
  SLK 0.746
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.746} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.747} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.756} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.756} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.768} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.768} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.807} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.896} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.032} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.017} {0.000} {0.094} {112.530} {0.303} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.827} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.822} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00082} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.043} {} {-0.006} {-0.752} {} {43} {(47.44, 25.52) (47.08, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_1} {} {0.001} {0.000} {0.043} {55.487} {-0.005} {-0.751} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 128
PATH 129
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_5/Q_reg[6]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_5/Q_reg[6]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.008}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.300}
    {=} {Slack Time} {0.747}
  END_SLK_CLC
  SLK 0.747
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.747} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.757} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.757} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.769} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.769} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.808} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.897} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.033} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.013} {0.000} {0.094} {112.530} {0.300} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.828} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.822} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.758} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.003} {0.000} {0.045} {54.633} {-0.008} {-0.755} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 129
PATH 130
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[8]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[8]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.302}
    {=} {Slack Time} {0.747}
  END_SLK_CLC
  SLK 0.747
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.747} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.757} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.757} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.769} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.770} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.809} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.897} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.035} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.014} {0.000} {0.103} {121.485} {0.302} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.828} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.822} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.752} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.002} {0.000} {0.044} {55.718} {-0.003} {-0.750} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 130
PATH 131
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_13/Q_reg[6]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_13/Q_reg[6]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.009}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.045}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.298}
    {=} {Slack Time} {0.748}
  END_SLK_CLC
  SLK 0.748
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.748} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.748} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.758} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.770} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.770} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.809} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.898} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.034} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.011} {0.000} {0.094} {112.530} {0.298} {1.045} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.829} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.823} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.759} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.002} {0.000} {0.045} {54.633} {-0.009} {-0.757} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 131
PATH 132
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[5]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_11/Q_reg[5]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.009}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.045}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.298}
    {=} {Slack Time} {0.748}
  END_SLK_CLC
  SLK 0.748
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.748} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.758} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.770} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.770} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.809} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.898} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.034} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.011} {0.000} {0.094} {112.530} {0.298} {1.045} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.829} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.823} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.759} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.002} {0.000} {0.045} {54.633} {-0.009} {-0.757} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 132
PATH 133
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[2]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[2]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.003}
    {-} {Recovery} {-0.052}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.302}
    {=} {Slack Time} {0.748}
  END_SLK_CLC
  SLK 0.748
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.748} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.758} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.770} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.770} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.810} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.149} {0.897} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC19_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.139} {0.000} {0.102} {} {0.288} {1.036} {} {59} {(84.42, 67.52) (84.78, 67.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN20_FE_DBTN2_rst} {} {0.014} {0.000} {0.103} {121.485} {0.302} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.829} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.823} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00094} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.070} {0.000} {0.044} {} {-0.005} {-0.752} {} {42} {(65.49, 73.11) (65.12, 73.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_7} {} {0.002} {0.000} {0.044} {55.718} {-0.003} {-0.751} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 133
PATH 134
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[6]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[6]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.007}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.047}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.299}
    {=} {Slack Time} {0.748}
  END_SLK_CLC
  SLK 0.748
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.748} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.758} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.770} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.770} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.810} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.899} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.035} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.013} {0.000} {0.094} {112.530} {0.299} {1.047} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.829} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.824} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.759} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.004} {0.000} {0.045} {54.633} {-0.007} {-0.755} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 134
PATH 135
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[4]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[4]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.007}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.300}
    {=} {Slack Time} {0.748}
  END_SLK_CLC
  SLK 0.748
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.748} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.758} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.770} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.770} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.810} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.899} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.035} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.013} {0.000} {0.094} {112.530} {0.300} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.829} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.824} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.759} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.004} {0.000} {0.045} {54.633} {-0.007} {-0.755} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 135
PATH 136
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[5]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[5]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.007}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.300}
    {=} {Slack Time} {0.748}
  END_SLK_CLC
  SLK 0.748
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.748} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.758} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.770} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.770} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.810} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.899} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.035} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.013} {0.000} {0.094} {112.530} {0.300} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.829} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.824} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.759} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.004} {0.000} {0.045} {54.633} {-0.007} {-0.755} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 136
PATH 137
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[6]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[6]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.007}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.299}
    {=} {Slack Time} {0.748}
  END_SLK_CLC
  SLK 0.748
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.748} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.758} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.770} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.770} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.810} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.899} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.035} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.013} {0.000} {0.094} {112.530} {0.299} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.829} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.824} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.759} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.004} {0.000} {0.045} {54.633} {-0.007} {-0.755} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 137
PATH 138
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[6]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[6]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.007}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.299}
    {=} {Slack Time} {0.748}
  END_SLK_CLC
  SLK 0.748
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.748} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.758} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.770} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.770} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.810} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.899} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.035} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.013} {0.000} {0.094} {112.530} {0.299} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.829} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.824} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.759} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.004} {0.000} {0.045} {54.633} {-0.007} {-0.755} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 138
PATH 139
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[5]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[5]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.007}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.299}
    {=} {Slack Time} {0.748}
  END_SLK_CLC
  SLK 0.748
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.748} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.758} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.758} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.770} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.771} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.810} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.899} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.035} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.012} {0.000} {0.094} {112.530} {0.299} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.829} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.824} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.760} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.004} {0.000} {0.045} {54.633} {-0.007} {-0.755} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 139
PATH 140
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[0]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[0]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.006}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.300}
    {=} {Slack Time} {0.749}
  END_SLK_CLC
  SLK 0.749
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.749} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.759} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.759} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.771} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.771} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.810} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.899} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.035} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.013} {0.000} {0.094} {112.530} {0.300} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.830} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.824} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.760} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.005} {0.000} {0.045} {54.633} {-0.006} {-0.755} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 140
PATH 141
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[5]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[5]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.007}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.299}
    {=} {Slack Time} {0.749}
  END_SLK_CLC
  SLK 0.749
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.749} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.759} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.759} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.771} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.771} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.810} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.899} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.035} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.012} {0.000} {0.094} {112.530} {0.299} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.830} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.824} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.760} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.004} {0.000} {0.045} {54.633} {-0.007} {-0.756} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 141
PATH 142
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[0]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[0]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.006}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.300}
    {=} {Slack Time} {0.749}
  END_SLK_CLC
  SLK 0.749
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.749} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.749} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.759} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.759} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.771} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.771} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.810} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.899} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.035} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.013} {0.000} {0.094} {112.530} {0.300} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.830} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.824} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.760} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.005} {0.000} {0.045} {54.633} {-0.006} {-0.755} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 142
PATH 143
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[4]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_6/Q_reg[4]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.006}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.299}
    {=} {Slack Time} {0.749}
  END_SLK_CLC
  SLK 0.749
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.749} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.750} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.759} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.759} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.771} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.771} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.810} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.899} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.035} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.013} {0.000} {0.094} {112.530} {0.299} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.830} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.824} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.760} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.005} {0.000} {0.045} {54.633} {-0.006} {-0.755} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 143
PATH 144
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[4]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_14/Q_reg[4]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.006}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.048}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.299}
    {=} {Slack Time} {0.749}
  END_SLK_CLC
  SLK 0.749
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.749} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.750} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.759} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.759} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.771} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.771} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.811} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.899} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.036} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.013} {0.000} {0.094} {112.530} {0.299} {1.048} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.830} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.825} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.760} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.005} {0.000} {0.045} {54.633} {-0.006} {-0.755} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 144
PATH 145
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[5]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_3/Q_reg[5]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.009}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.045}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.296}
    {=} {Slack Time} {0.749}
  END_SLK_CLC
  SLK 0.749
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.749} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.750} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.759} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.759} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.771} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.771} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.811} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.899} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.036} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.010} {0.000} {0.094} {112.530} {0.296} {1.045} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.830} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.825} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.760} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.002} {0.000} {0.045} {54.633} {-0.009} {-0.758} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 145
PATH 146
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[0]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_10/Q_reg[0]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.006}
    {-} {Recovery} {-0.055}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.049}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.300}
    {=} {Slack Time} {0.749}
  END_SLK_CLC
  SLK 0.749
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.749} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.750} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.759} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.759} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.771} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.771} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.811} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.089} {0.000} {0.124} {151.034} {0.150} {0.900} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC25_FE_DBTN2_rst} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.136} {0.000} {0.093} {} {0.287} {1.036} {} {53} {(88.79, 31.12) (89.16, 31.46)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN26_FE_DBTN2_rst} {} {0.013} {0.000} {0.094} {112.530} {0.300} {1.049} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.830} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.825} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00084} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.064} {0.000} {0.044} {} {-0.011} {-0.760} {} {42} {(64.09, 23.77) (64.45, 23.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_2} {} {0.006} {0.000} {0.045} {54.633} {-0.006} {-0.755} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 146
PATH 147
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_8/Q_reg[12]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_8/Q_reg[12]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.296}
    {=} {Slack Time} {0.749}
  END_SLK_CLC
  SLK 0.749
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.749} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.750} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.759} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.759} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.771} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.772} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.811} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.150} {0.899} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC13_FE_DBTN2_rst} {A} {^} {Z} {^} {} {BUF_X2} {0.134} {0.000} {0.109} {} {0.284} {1.033} {} {44} {(102.09, 68.56) (102.50, 68.19)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN14_FE_DBTN2_rst} {} {0.013} {0.000} {0.109} {90.942} {0.296} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.831} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.824} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00110} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.044} {} {-0.007} {-0.756} {} {41} {(79.86, 65.77) (80.23, 65.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_14} {} {0.002} {0.000} {0.044} {55.119} {-0.005} {-0.755} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 147
PATH 148
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[5]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_21/Q_reg[5]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.296}
    {=} {Slack Time} {0.749}
  END_SLK_CLC
  SLK 0.749
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.749} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.750} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.759} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.759} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.771} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.772} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.811} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.150} {0.899} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC13_FE_DBTN2_rst} {A} {^} {Z} {^} {} {BUF_X2} {0.134} {0.000} {0.109} {} {0.284} {1.033} {} {44} {(102.09, 68.56) (102.50, 68.19)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN14_FE_DBTN2_rst} {} {0.013} {0.000} {0.109} {90.942} {0.296} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.831} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.006} {0.000} {0.007} {94.466} {-0.075} {-0.824} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00110} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.068} {0.000} {0.044} {} {-0.007} {-0.756} {} {41} {(79.86, 65.77) (80.23, 65.42)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_14} {} {0.002} {0.000} {0.044} {55.119} {-0.005} {-0.755} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 148
PATH 149
  VIEW  default
  CHECK_TYPE {Recovery Check}
  REF {datapath_inst/decode_inst/decode_RF/REG_i_8/Q_reg[5]} {CK}
  ENDPT {datapath_inst/decode_inst/decode_RF/REG_i_8/Q_reg[5]} {RN} {DFFR_X1} {^} {leading} {clk} {clk(C)(P)(default)*}
  BEGINPT {} {rst} {} {v} {leading} {@} {@(D)(P)(default)*}
  REQ_CLC
    {} {Other End Arrival Time} {-0.005}
    {-} {Recovery} {-0.051}
    {+} {Phase Shift} {1.000}
    {=} {Required Time} {1.046}
  END_REQ_CLC
  SLK_CLC
    {-} {Arrival Time} {0.296}
    {=} {Slack Time} {0.750}
  END_SLK_CLC
  SLK 0.750
  ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Input Delay} {0.000}
    {=} {Beginpoint Arrival Time} {0.000}
  END_ARR_CLC
  LAUNCH_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
  END_LAUNCH_CLK_PATH 
  DATA_PATH 
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location} 
    PORT {} {rst} {v} {} {} {rst} {} {} {} {0.002} {33.234} {0.000} {0.750} {} {14} {(116.56, 197.68) } 
    NET {} {} {} {} {} {rst} {} {0.001} {0.000} {0.002} {33.234} {0.001} {0.751} {} {} {} 
    INST {datapath_inst/decode_inst/FE_DBTC2_rst} {A} {v} {ZN} {^} {} {INV_X1} {0.009} {0.000} {0.006} {} {0.010} {0.760} {} {1} {(111.85, 191.77) (111.68, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_DBTN2_rst} {} {0.000} {0.000} {0.006} {1.807} {0.010} {0.760} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC0_FE_DBTN2_rst} {A} {^} {ZN} {v} {} {INV_X1} {0.012} {0.000} {0.007} {} {0.022} {0.772} {} {1} {(111.97, 191.77) (112.14, 191.39)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN0_FE_DBTN2_rst} {} {0.000} {0.000} {0.007} {6.352} {0.022} {0.772} {} {} {} 
    INST {datapath_inst/decode_inst/FE_OFC1_FE_DBTN2_rst} {A} {v} {ZN} {^} {} {INV_X4} {0.039} {0.000} {0.088} {} {0.062} {0.812} {} {52} {(112.16, 183.37) (112.34, 182.99)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/FE_OFN1_FE_DBTN2_rst} {} {0.088} {0.000} {0.124} {151.034} {0.150} {0.900} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/FE_OFC13_FE_DBTN2_rst} {A} {^} {Z} {^} {} {BUF_X2} {0.134} {0.000} {0.109} {} {0.284} {1.033} {} {44} {(102.09, 68.56) (102.50, 68.19)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/FE_OFN14_FE_DBTN2_rst} {} {0.013} {0.000} {0.109} {90.942} {0.296} {1.046} {} {} {} 
  END_DATA_PATH
  OTHER_ARR_CLC
    {} {Clock Rise Edge} {0.000}
    {+} {Source Insertion Delay} {-0.081}
    {=} {Beginpoint Arrival Time} {-0.081}
  END_OTHER_ARR_CLC
  CAP_CLK_PATH
    COLUMNS {instance} {fpin} {fedge} {tpin} {tedge} {net} {cell} {delay} {incr_delay} {slew} {load} {arrival} {required} {stolen} {fanout} {pin_location}
    PORT {} {clk} {^} {} {} {clk} {} {} {} {0.002} {94.466} {-0.081} {-0.831} {} {31} {(0.00, 104.23) } 
    NET {} {} {} {} {} {clk} {} {0.005} {0.000} {0.006} {94.466} {-0.076} {-0.826} {} {} {} 
    INST {datapath_inst/decode_inst/decode_RF/CTS_ccl_a_buf_00092} {A} {^} {Z} {^} {} {CLKBUF_X3} {0.069} {0.000} {0.044} {} {-0.007} {-0.757} {} {43} {(71.19, 25.52) (70.83, 25.86)} 
    NET {} {} {} {} {} {datapath_inst/decode_inst/decode_RF/CTS_6} {} {0.002} {0.000} {0.044} {55.670} {-0.005} {-0.755} {} {} {} 
  END_CAP_CLK_PATH
END_PATH 149