DLX-Microprocessor
/
physical_design
physical_design
..
1_stage_init.enc.dat
2_stage_route_placement.enc.dat
3_stage_preCTS.enc.dat
4_stage_postCTS.enc.dat
5_stage_postRoute.enc.dat
5_stage_post_filler.enc.dat
6_stage_afterAll.enc.dat
constraints
designs
timingReport
1_stage_init.enc
2_stage_route_placement.enc
3_stage_preCTS.enc
4_stage_postCTS.enc
5_stage_postRoute.enc
5_stage_post_filler.enc
6_stage_afterAll.enc
DLX.gateCount
DLX.sdf
DLX.spef
DLX.v
physical_design.cmd1
physical_design.cmd4
physical_design.log
physical_design.log1
physical_design.log2
physical_design.log3
physical_design.log4
physical_design.logv1
physical_design.logv2
physical_design.logv3
physical_design.logv4
power_report.txt
report_timing_preCTS.txt
top.mtarpt