# RISC_ISA_Pipeline

Assembler.c takes an assembly code file via command-line input and outputs the corresponding machine code file. Simulator.c simulates the behavior of a pipelined processor based on the machine code file given as input. The processor in this project is a simplified version of an ARM processor with a smaller subset of instructions and 8 registers instead of 32. 
![Pipeline](https://user-images.githubusercontent.com/121872399/212809928-6613b704-8b88-4b05-b9d1-99143c3c15bd.png)