Simplified-RISC-V-processor / instruction_memory_tb.v
instruction_memory_tb.v
Raw
`include "Instruction_memory.v"

module instMem_tb();

    reg [15:0] pc;
    wire [31:0] instruction;
    integer x;

    instMem uut(
        .pc(pc),
        .instruction(instruction)
    );


    initial begin

        #10
        pc = 16'b0;
        for (x = 0; x<3; x = x+1) begin
            $display("Inst_Mem %d: %h", x, uut.inst_mem[x]); 
        end

        #10
        pc = 16'b10000;
        for (x = 0; x<3; x = x+1) begin
            $display("Inst_Mem %d: %h", x, uut.inst_mem[x]); 
        end

        #10 
        $finish();
    end

endmodule